AMD has announced technical details for its upcoming Zen 6 processor, codenamed Verano. Built on TSMC N2P manufacturing technology, the chip is designed for the SB1 socket and features six active CCDs alongside two dummy dies within its physical package.
The Verano architecture utilizes new IO dies with four Memory Controller Dies, supporting 24 channels of LPDDR5X-8533 via exchangeable SOCAMM2. Configurations scale up to 192 Zen 6c cores or 72 Zen 6 cores, with a thermal design power reaching 500 Watts.
This platform marks a shift in high-performance computing, though the SB1 socket will not support dual-socket setups. AMD plans to launch the first Verano processors in the second half of 2027, targeting dense core counts and high-speed memory bandwidth.